diff options
Diffstat (limited to 'sys-boot/u-boot/files')
3 files changed, 157 insertions, 0 deletions
diff --git a/sys-boot/u-boot/files/0001-Add-regulator-needed-for-usage-of-USB.patch b/sys-boot/u-boot/files/0001-Add-regulator-needed-for-usage-of-USB.patch new file mode 100644 index 0000000..39c2bc9 --- /dev/null +++ b/sys-boot/u-boot/files/0001-Add-regulator-needed-for-usage-of-USB.patch @@ -0,0 +1,69 @@ +From 6ad924ab3b6b2a4d8c73a9871d0e94245cce6fcf Mon Sep 17 00:00:00 2001 +From: Nadia Holmquist Pedersen <nadia@nhp.sh> +Date: Sat, 20 Jun 2020 01:41:22 +0200 +Subject: [PATCH 1/3] Add regulator needed for usage of USB + +--- + arch/arm/dts/rk3399-pinebook-pro.dts | 21 +++++++++++++++++++-- + 1 file changed, 19 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts +index 294d21bf45..6214887a1c 100644 +--- a/arch/arm/dts/rk3399-pinebook-pro.dts ++++ b/arch/arm/dts/rk3399-pinebook-pro.dts +@@ -207,6 +207,16 @@ + }; + }; + ++ vcc3v3_s0: vcc3v3-s0-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lcdvcc_en>; ++ regulator-name = "vcc3v3_s0"; ++ regulator-always-on; ++ }; ++ + /* 5 V USB power supply */ + vcc5v0_usb: pa_5v: vcc5v0-usb-regulator { + compatible = "regulator-fixed"; +@@ -610,8 +620,8 @@ + }; + }; + +- vcc3v3_s0: SWITCH_REG2 { +- regulator-name = "vcc3v3_s0"; ++ unused: SWITCH_REG2 { ++ regulator-name = "SWITCH_REG2"; + regulator-always-on; + regulator-boot-on; + +@@ -872,6 +882,11 @@ + rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + ++ /* Shared between LCD and usb */ ++ lcdvcc_en: lcdvcc-en { ++ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ + vcc5v0_host_en_gpio: vcc5v0-host-en-gpio { + rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; +@@ -1054,10 +1069,12 @@ + }; + + &usb_host1_ehci { ++ phy-supply = <&vcc3v3_s0>; + status = "okay"; + }; + + &usb_host1_ohci { ++ phy-supply = <&vcc3v3_s0>; + status = "okay"; + }; + +-- +2.27.0 + diff --git a/sys-boot/u-boot/files/0002-Correct-boot-order-to-be-USB-SD-eMMC.patch b/sys-boot/u-boot/files/0002-Correct-boot-order-to-be-USB-SD-eMMC.patch new file mode 100644 index 0000000..b6e755a --- /dev/null +++ b/sys-boot/u-boot/files/0002-Correct-boot-order-to-be-USB-SD-eMMC.patch @@ -0,0 +1,38 @@ +From e622965b31e1d08c2b7c6b3a8d683c59f37b2733 Mon Sep 17 00:00:00 2001 +From: Nadia Holmquist Pedersen <nadia@nhp.sh> +Date: Sat, 20 Jun 2020 01:47:52 +0200 +Subject: [PATCH 2/3] Correct boot order to be USB -> SD -> eMMC + +--- + include/configs/rockchip-common.h | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h +index 0b9e24d1db..9e217fad2a 100644 +--- a/include/configs/rockchip-common.h ++++ b/include/configs/rockchip-common.h +@@ -17,8 +17,8 @@ + /* First try to boot from SD (index 0), then eMMC (index 1) */ + #if CONFIG_IS_ENABLED(CMD_MMC) + #define BOOT_TARGET_MMC(func) \ +- func(MMC, mmc, 0) \ +- func(MMC, mmc, 1) ++ func(MMC, mmc, 1) \ ++ func(MMC, mmc, 0) + #else + #define BOOT_TARGET_MMC(func) + #endif +@@ -55,9 +55,9 @@ + + #ifdef CONFIG_ROCKCHIP_RK3399 + #define BOOT_TARGET_DEVICES(func) \ ++ BOOT_TARGET_USB(func) \ + BOOT_TARGET_MMC(func) \ + BOOT_TARGET_NVME(func) \ +- BOOT_TARGET_USB(func) \ + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) \ + BOOT_TARGET_SF(func) +-- +2.27.0 + diff --git a/sys-boot/u-boot/files/0003-Enable-the-power-LED-during-early-startup.patch b/sys-boot/u-boot/files/0003-Enable-the-power-LED-during-early-startup.patch new file mode 100644 index 0000000..a2e811c --- /dev/null +++ b/sys-boot/u-boot/files/0003-Enable-the-power-LED-during-early-startup.patch @@ -0,0 +1,50 @@ +From 08e8ace48b5c3a31b44661ef22a8b8a459906d7e Mon Sep 17 00:00:00 2001 +From: Nadia Holmquist Pedersen <nadia@nhp.sh> +Date: Sat, 20 Jun 2020 01:49:49 +0200 +Subject: [PATCH 3/3] Enable the power LED during early startup + +--- + arch/arm/mach-rockchip/rk3399/rk3399.c | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c +index 4fda93b152..e24b39486d 100644 +--- a/arch/arm/mach-rockchip/rk3399/rk3399.c ++++ b/arch/arm/mach-rockchip/rk3399/rk3399.c +@@ -19,6 +19,8 @@ + #include <asm/arch-rockchip/hardware.h> + #include <linux/bitops.h> + #include <power/regulator.h> ++#include <dt-bindings/gpio/gpio.h> ++#include <dt-bindings/pinctrl/rockchip.h> + + DECLARE_GLOBAL_DATA_PTR; + +@@ -119,8 +121,8 @@ void board_debug_uart_init(void) + struct rk3399_grf_regs * const grf = (void *)GRF_BASE; + #ifdef CONFIG_TARGET_CHROMEBOOK_BOB + struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; +- struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE; + #endif ++ struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE; + + #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000) + /* Enable early UART0 on the RK3399 */ +@@ -153,6 +155,14 @@ void board_debug_uart_init(void) + spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL); + #endif /* CONFIG_TARGET_CHROMEBOOK_BOB */ + ++ { ++ // set GPIO0_A2/B3 to GPIO_ACTIVE_HIGH ++ // set GPIO0_A2/B3 to OUTPUT ++ int mask = (1UL << RK_PA2) | (1UL << RK_PB3); ++ setbits_le32(&gpio->swport_dr, mask); ++ setbits_le32(&gpio->swport_ddr, mask); ++ } ++ + /* Enable early UART2 channel C on the RK3399 */ + rk_clrsetreg(&grf->gpio4c_iomux, + GRF_GPIO4C3_SEL_MASK, +-- +2.27.0 + |