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Diffstat (limited to 'sys-boot/u-boot/files/0002-Enable-the-power-LED-during-early-startup.patch')
-rw-r--r--sys-boot/u-boot/files/0002-Enable-the-power-LED-during-early-startup.patch50
1 files changed, 50 insertions, 0 deletions
diff --git a/sys-boot/u-boot/files/0002-Enable-the-power-LED-during-early-startup.patch b/sys-boot/u-boot/files/0002-Enable-the-power-LED-during-early-startup.patch
new file mode 100644
index 0000000..b7b37c2
--- /dev/null
+++ b/sys-boot/u-boot/files/0002-Enable-the-power-LED-during-early-startup.patch
@@ -0,0 +1,50 @@
+From 18600ddc0569ae424066add8e288dbc2e4d0e45c Mon Sep 17 00:00:00 2001
+From: "Jakob L. Kreuze" <zerodaysfordays@sdf.org>
+Date: Fri, 15 Apr 2022 18:37:37 -0400
+Subject: [PATCH 2/3] Enable the power LED during early startup
+
+---
+ arch/arm/mach-rockchip/rk3399/rk3399.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
+index 2bc8e60b99..c7ba8a0595 100644
+--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
++++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
+@@ -20,6 +20,8 @@
+ #include <asm/arch-rockchip/hardware.h>
+ #include <linux/bitops.h>
+ #include <power/regulator.h>
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/pinctrl/rockchip.h>
+
+ DECLARE_GLOBAL_DATA_PTR;
+
+@@ -120,8 +122,8 @@ void board_debug_uart_init(void)
+ struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
+ #ifdef CONFIG_TARGET_CHROMEBOOK_BOB
+ struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
+- struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
+ #endif
++ struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
+
+ #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+ /* Enable early UART0 on the RK3399 */
+@@ -154,6 +156,14 @@ void board_debug_uart_init(void)
+ spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), GPIO_PULL_NORMAL);
+ #endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
+
++ {
++ // set GPIO0_A2/B3 to GPIO_ACTIVE_HIGH
++ // set GPIO0_A2/B3 to OUTPUT
++ int mask = (1UL << RK_PA2) | (1UL << RK_PB3);
++ setbits_le32(&gpio->swport_dr, mask);
++ setbits_le32(&gpio->swport_ddr, mask);
++ }
++
+ /* Enable early UART2 channel C on the RK3399 */
+ rk_clrsetreg(&grf->gpio4c_iomux,
+ GRF_GPIO4C3_SEL_MASK,
+--
+2.35.1
+